Graphene Flagship researchers produced graphene-based spintronics devices that utilize both electron charge and spin at room temperature. Demonstrating the spin’s feasibility for bridging distances of up to several micrometres, these results may open the door to new possibilities for integrating information-processing and storage in a single chip.
The Graphene Flagship program recognizes the potential of spintronics devices made from graphene-related materials. Researchers from different universities successfully showed that it is possible to manipulate graphene’s spin properties in a controlled manner at room temperature. These results inspire new directions in the development of spin-logic devices and quantum computing. With miniaturization a major driving force behind the electronics industry, graphene opens new possibilities for compacting spin-logic operations with magnetic memory elements in a single platform, notes Catalan Institution for Research and Advanced Studies (ICREA) Research Professor Stephan Roche, who has been leading the Graphene Flagships Spintronics Work Package since its inception.
Graphene can extend the area of spintronics inter-device communication from nanometres to micrometres at low energy cost. Although initial theoretical predictions estimated spin lifetimes of around a microsecond in the material, previous experiments have shown a few nanoseconds at best. This puzzling discrepancy initially suggested that the material’s impurities and defects are primarily responsible for spin relaxation. However, Flagship researchers have challenged these conventionally conceived mechanisms of spin relaxation, and proposed several new ones that are unique to graphene.
In particular, they observed that the rate at which spins relax in systems composed of graphene and transition metal dichalcogenides (TMDCs) strongly depends on whether they are pointing in or out of the graphene plane. Graphene interfaced with a TMDC could serve as a spin filter, since the transfer of spin information depends on the initial spin polarization of the injected electrons, enabling new low-power spin-transistor concepts, explains Prof. Roche.
It is important to note that experiments were carried out at room temperature and are particularly important for externally manipulating electron spins in graphene.
Given that graphene can maintain spin coherence over sufficiently long distances, integrating it with another layered material in which spin is maintained for considerably lesser time can result in fabrication of a spin field-effect transistor-like device. Combining graphene with molybdenum disulfide (MoS2) (where spin lasts for picoseconds), Flagship researchers demonstrated that it is possible to control where the spin can go by using a gate voltage. This combination of graphene with another thin 2D material with contrasting spintronic properties enables the creation of a spin switch, observes Prof. Roche.
Researchers have chosen MoS2 due to its low-spin lifetime stemming from its strong spin-orbit coupling. Importantly, this material mix worked at room temperature.
Conductance mismatch has been widely identified as a key factor that could substantially reduce spin injection from ferromagnets into semiconductors.
The Flagship team showed that they could greatly improve the efficiency of the injection and detection of spin electrons into graphene, by using a sandwich of materials. This consisted of a boron nitride insulator in-between the graphene layer and the ferromagnetic spin injector/detector electrodes.
In the device produced, polarization increased up to 70% with voltage, challenging n conceptions that only ferromagnets can influence spin polarization. Instead, quantum tunneling was found to affect spin polarization in the devices. In particular, spin bridged a distance of 10 micrometers in more than 3 nanoseconds at room temperature.
The use of graphene and other 2D materials for advancing next-generation spin torque-based memories (such as STT-MRAM and SOT-MRAM) is also extremely appealing, and has stimulated imec to take the lead of the consortium and work on their large-scale integration in the fab environment, says Kevin Garello, WP leader and imec researcher leading the emerging magnetic advanced memory concepts research.